In a Long Term Evolution Advanced (LTE-A) system, an uplink physical channel includes: a Physical Uplink Shared Channel (PUSCH) and a Physical Uplink Control Channel (PUCCH). Generally, uplink control signaling is transmitted over the PUCCH, and mainly includes: Channel Quality Indicator (CQI) signaling, an Acknowledged/non-acknowledged (ACK/NACK) message and a Scheduling Request Indicator (SRI) message.
Specially, a transmission format (or a carrier) of the uplink ACK/NACK message on the PUCCH in the LTE-A system applies a transmission format based on Discrete Fourier Transform (DFT)-Spreading-Orthogonal Frequency Division Multiplex (OFDM), and an example of the format is shown in FIG. 1. The format occupies 12 sub-carriers in one Physical Resource Block (PRB) defined by the 3rd Generation Partnership Project (3GPP) LTE/LTE-A in one slot, each sub-carrier indirectly corresponds to a Quaternary Phase Shift Keying (QPSK) modulation symbol, and each QPSK modulation symbol carries two bits, and accordingly one slot needs to carry 12*2=24 bits in total, and thus the entire DFT-S-OFDM format needs to carry 24 QPSK modulation symbols, that is, 48 bits, in two slots.
The specific main process of transmitting the information bits by using the PUCCH format based on DFT-S-OFDM is as follows: as shown in FIG. 1, first, a transmitting end encodes the information bits to be transmitted through a certain channel encoding manner to generate a sequence of 48 coded bits [b0, b1, . . . , b47], and then the 48 coded bits are scrambled, the 48 coded bits output after scrambling are modulated through the QPSK to obtain a sequence of 24 QPSK symbols [q0, q1, . . . , q23], and then 12-point DFT is performed on the first 12 symbols of the 24 modulation symbols [q0, q1, . . . , q11], the 12 data symbols [Q0, Q1, . . . , Q11] output after the DFT are sequentially mapped onto the 12 sub-carriers of the first slot 0, in which the sequential mapping refers to that adjacent modulation symbols in the modulation symbol sequence are mapped onto adjacent sub-carriers, and afterwards, the data symbol on each sub-carrier is extended into five data symbols through a certain sequence [w0, w1, . . . , w4] of length 5, and the data symbols are mapped into a location for the data symbols in the time domain; likewise, the last 12 QPSK modulation symbols [Q12, Q13, . . . , Q23] are mapped onto the second slot 1; and finally, a corresponding pilot is put on the preset pilot location and is transmitted. The process described above also has other equivalent implementation methods. For example, the obtained 24 modulation symbols are extended first, and then the DFT is performed on the modulation symbols mapped on each time domain symbol, and finally, the modulation symbols are mapped onto the physical channel for transmission.
It is assumed that, in the 48 coded bits generated by encoding the information bits to be transmitted, the first 24 coded bits b(0), b(1), . . . , b(23) and the last 24 coded bits b(24), b(25), . . . , b(47) are independently obtained. Accordingly, when a structure similar to DFT-S-OFDM is used, the modulation symbols corresponding to the first 24 coded bits are sequentially mapped onto the slot 0, and the last 24 coded bits are sequentially mapped onto the slot 1. In this way, the receiving of the first 24 coded bits merely depends on the channel condition of the slot 0. However, the channel condition of the slot 0 may be good or bad, and thus the receiving performance is not stable. Likewise, the receiving of the last 24 coded bits merely depends on the channel condition of the slot 1. Moreover, as shown in FIG. 1, the last symbol in the slot 1 may be occupied for other use sometimes, for example, the last symbol is used to transmit a Sounding Reference Signal (SRS) sometimes, and when such a case occurs, the extension length in the slot 1 of the DFT-S-OFDM format is shortened from the length 5 to a length 4. The performance of long extension length is better than the short one. As such, if the first 24 coded bits are merely mapped onto the slot 0, and the last 24 coded bits are merely mapped onto the slot 1, the receiving performance of the first 24 coded bits is better than the receiving performance of the last 24 coded bits on the whole, thereby causing unbalanced receiving performance, and requiring a rather complex algorithm of the receiver.